The present invention is directed to throttle settings for a chipset. More particularly, the present invention is directed to optimizing throttle settings based on detected temperatures.
Chipsets contain interfaces to couple with components external to the chipset. The chipsets also include internal interfaces between respective logical components. During operation, these interfaces generate heat as bandwidth traverses through the respective interfaces and along the signal lines. The temperature may rise to a level that causes problems during operation of the chipset. As more current travels through an interface, more heat may be generated that may affect components and interfaces of the chipset.
Heat sinks, air flows or combinations of heat sinks and air flows may be used as thermal solutions to keep silicon of the chipset from exceeding its junction temperature specification. More recent chipsets may include a mechanism (i.e., throttling) for limiting a maximum sustainable power by lowering a clock-frequency/duty-cycle and/or limiting the maximum sustainable bandwidth. Analysis and estimations show that realistic applications may not sustain high power consuming bandwidths. The throttle values may be fixed values and allow the speculated worse-case-realistic-application to achieve the bandwidths it could generate while not allowing artificially crafted malicious applications to sustain higher bandwidths. These thermal solutions may no longer be sufficient as the worse-case-realistic-application power may be close to highest achievable power and also consume near-maximum bandwidths. Therefore, a set of fixed throttle values to cover the most extreme cases may visibly hinder the performance of parts even in an environment that never sees such extreme thermal conditions.